The present invention is related to translator circuits useful for converting emitter coupled logic (ECL) level signals to complementary metal oxide semiconductor (CMOS) level signals.
BiCMOS integrated circuits are semiconductor devices in which bipolar technology is combined with CMOS technology. BiCMOS integrated circuits are useful for providing, on a single chip, both the desirable switching speeds of bipolar devices and the desirable area requirements of CMOS devices. The resulting BiCMOS device has a silicon area per unit current drive which is much less than a comparable CMOS circuit.
Some BiCMOS integrated circuit communicate with the outside world with signal levels appropriate for bipolar logic circuits while CMOS level signals are used within the device. A common bipolar logic used in BiCMOS devices is ECL which has a signal range from -0.9 to -1.7 volts. CMOS signals, however, swing in a 5-volt range. The ECL level input signals must therefore be buffered and translated to CMOS level signals. Another goal, then, is to bring ECL signals into the BiCMOS integrated circuit and translate these incoming signals into CMOS levels for use by the CMOS portion of the chip as quickly as possible.